In its simplest form, a copper-clad electrical-grade laminate includes, as a component, one or more dielectric layers of woven or non-woven glass fiber impregnated with epoxy or other polymer resin; the composite is known in the art as xe2x80x9cprepreg.xe2x80x9d The prepreg is sandwiched between sheets of metal foil (typically formed of copper) and pressed at elevated temperature and pressure to form a laminate sheet.
These laminates are generally manufactured in bulk and stacked one upon another. The assembly of component layers for one laminate is referred to as a press layup, and the stack of layups is known as a book. The layups are separated (typically, with a metallic separator); heated; and then subjected to pressure. After curing and cooling, the then-bonded individual laminates are separated from one another and subjected to further processing en route to producing a printed circuit board (also known as a xe2x80x9cprinted wiring boardxe2x80x9d).
Specifically, a printed circuit board can be formed from a single laminate with external etched wiring patterns; or a plurality of laminates with etched patterns can be stacked and bonded to produce a multi-layer printed circuit board.
Traditionally, printed circuit boards were made from laminates having insulation layers with a thickness of about 1.5 mm or more. However, printed circuit boards comprising insulation layers of less than about 0.15 mm thickness are now in use. The laminates used to produce these thinner printed circuit boards are referred to as xe2x80x9cthin laminatesxe2x80x9d or xe2x80x9cthin-laminate panels.xe2x80x9d
In traditional laminates, electrical shorting across separated conductive layers is rarely a problem due to the substantial thickness of the insulation layer. In xe2x80x9cthin laminates,xe2x80x9d however, electrical shorts through the insulation layer may exist as a consequence of impurities in the insulation layer. If an electrical short exists across the layers, the laminate is defective and unsuitable for producing a printed circuit board, and the identification and removal of such a defective laminate (before additional processing) can produce substantial savings of time and resources. The potential for these defects typically increases as laminate thickness decreases.
Laminates can be subjected to a high-potential (Hipot) test to detect shorts between the conductive layers. However, electrical shorts may also exist at the edges of laminates created by the smearing of conductive material across the edge of the laminate when the laminate panel is fabricated from a larger laminate structure, thereby forming a conductive link between the conductive layers across the edge of the laminate. The smeared conductive material, however, is typically readily removed from the edge of the laminate during subsequent processing. Accordingly, a laminate with a short only on an edge surface need not be considered defective and may still be readily usable in producing a printed circuit board.
The Hipot test, however, simply measures the ohmic resistance between conductive layers; if a low resistance (produced, e.g., by an electrical short) is detected; however, the source of that low resistance is not identified. Accordingly, a laminate with an internal defect in the insulation layer is not readily distinguishable from a laminate that has a short on one of its edges; and both are consequently tagged as being xe2x80x9cdefective.xe2x80x9d In some cases, testing of the laminates may be forsaken in view of this inability to distinguish these different types of electrical shorts.
In other cases, known methods may be used to attempt to remove conductive material from an edge of the laminate to thereby remedy this potential source of shorts. For example, in published Japanese Patent Application 05-229059A (Hitachi Chemical Co.), a router is used to trim the edges of a thin laminate to prevent formation of electrical shorts produced by conductive material extending across an edge of the laminate, thereby improving the reliability with which the laminates can be tested for electrical reliability.
Likewise, U.S. Pat. No. 6,114,015, issued to Fillion et al., describes a similar procedure intended to remove shorts formed by conductive material spread across the edges of laminates by using a router to trim the edges of the laminate such that the laminate can be electrically tested without receiving xe2x80x9cfalse negativesxe2x80x9d produced by an electrical short at an edge of the laminate.
The apparatus and methods, described below, build upon the above-described subject matter and provide a new method for remedying electrical shorts across edges of laminates to enable accurate testing of the laminates for electrical defects. Specifically, a laser is directed along a path proximate one or more edges of an outer surface of a conductive layer of the laminate. The laser removes a strip from the conductive layer to electrically isolate a central, bulk portion of the conductive layer from the edges of the laminate.
The strip can be cut immediately adjacent the edges of the conductive layer or merely proximate the edges such that conductive material may remain adjacent the edge; though, the remaining conductive material near the edge will be electrically isolated from the remaining bulk of the conductive layer. These methods can be used either on large laminate sheets or on smaller panels. These methods are particularly advantageous for use with laminates wherein the insulation layer has a thickness of about 0.25 mm or less. These thin laminates are electrically tested by measuring current flow (e.g., measuring voltage or resistance) between conductive layers separated by an insulating layer in the laminate.